Silicon carbide (SiC) has a combination of electrical and physical properties that make it attractive for a semiconductor material for high temperature, high voltage, high frequency and high power electronic devices. These properties include a 3.0 eV bandgap, a 4 MV/cm electric field breakdown, a 4.9 W/cm-K thermal conductivity, and a 2.0×107 cm/s electron drift velocity.
Silicon carbide has the unique property among wide bandgap compound semiconductor materials that it forms a native oxide. Thus, a thermal SiO2 layer may be formed on a SiC layer. The ability to form a thermal oxide on SiC opens the door for the formation of metal-oxide-semiconductor (MOS) devices using silicon carbide, including, for example, MOS field-effect transistors (MOSFETs), MOS capacitors, insulated gate bipolar transistors (IGBT's), MOS-controlled thyristors (MCTs), lateral diffused MOSFETs (LDMOSFETs) and other related devices. Given the unique material properties of SiC described above, such devices may have substantially better theoretical operating characteristics compared to devices formed using other semiconductor materials, particularly for applications requiring high power, high current capacity, and/or high frequency operation. Accordingly, taking full advantage of SiC's electronic properties in MOS devices and resulting integrated circuits requires appropriate SiC oxidation technology.
The interface quality of SiO2 thermally grown on a silicon substrate may be excellent. However, the quality of thermally grown SiC/SiO2 interfaces has not achieved the same levels as that of Si/SiO2 interfaces. Accordingly, the quality of oxides on silicon carbide (SiC) has been a major obstacle to developing commercially viable silicon carbide MOS devices. Indeed, with the recent improvements in SiC crystal quality, oxide quality may perhaps be the largest barrier to the realization of commercially viable SiC MOS power devices and integrated circuits.
Oxides on SiC have been widely reported to have unacceptably high densities of interface states (or “traps”) and fixed oxide charges, both of which may have an adverse effect on MOS device performance. As used herein, the term “state” or “trap” refers to an available energy level position within the bandgap of a semiconductor or insulator material. An interface trap or state may be located at or near a semiconductor/insulator interface. Interface states may occur due to the presence of dangling or unterminated atomic bonds within a material. Thus, the density of electronic states at an interface may be an indication of the amount of crystallographic disorder at the interface.
Interface traps may capture electronic charge carriers (i.e. electrons and/or holes), which may produce undesired operating characteristics in devices incorporating the interface. In particular, electronic states present at the SiC/SiO2 interface may reduce surface electron mobility in the SiC layer. If the gate oxide of a MOS device has a high density of interface states, the resulting device may have reduced inversion channel mobility, increased threshold voltage, increased on-resistance and/or other undesirable characteristics.
Recently, annealing of a thermal oxide in a nitric oxide (NO) ambient has shown promise in a planar 4H—SiC MOSFET structure not requiring a p-well implant. See M. K. Das, L. A. Lipkin, J. W. Palmour, G. Y. Chung, J. R. Williams, K. McDonald, and L. C. Feldman, “High Mobility 4H—SiC Inversion Mode MOSFETs Using Thermally Grown, NO Annealed SiO2,” IEEE Device Research Conference, Denver, Colo., Jun. 19-21, 2000 and G. Y. Chung, C. C. Tin, J. R. Williams, K. McDonald, R. A. Weller, S. T. Pantelides, L. C. Feldman, M. K. Das, and J. W. Palmour, “Improved Inversion Channel Mobility for 4H—SiC MOSFETs Following High Temperature Anneals in Nitric Oxide,” IEEE Electron Device Letters accepted for publication, the disclosures of which are incorporated by reference as if set forth fully herein. This anneal is shown to significantly reduce the interface state density near the conduction band edge, as described in G. Y. Chung, C. C. Tin, J. R. Williams, K. McDonald, M. Di Ventra, S. T. Pantelides, L. C. Feldman, and R. A. Weller, “Effect of nitric oxide annealing on the interface trap densities near the band edges in the 4H polytype of silicon carbide,” Applied Physics Letters, Vol. 76, No. 13, pp. 1713-1715, March 2000, the disclosure of which is incorporated herein as if set forth fully. High electron mobility (35-95 cm2/Vs) is obtained in the surface inversion layer due to the improved MOS interface.
Unfortunately, NO is a health hazard having a National Fire Protection Association (NFPA) health danger rating of 3, and the equipment in which post-oxidation anneals are typically performed is open to the atmosphere of the cleanroom. They are often exhausted, but the danger of exceeding a safe level of NO contamination in the room is not negligible.
Growing the oxide in N2O is possible as described in J. P. Xu, P. T. Lai, C. L. Chan, B. Li, and Y. C. Cheng, “Improved Performance and Reliability of N2O-Grown Oxynitride on 6H—SiC,” IEEE Electron Device Letters, Vol. 21, No. 6, pp. 298-300, June 2000, the disclosure of which is incorporated by reference as if set forth fully herein. Xu et al. describe oxidizing SiC at 1100° C. for 360 minutes in a pure N2O ambient and annealing in N2 for 1 hour at 1100° C.
Post-growth nitridation of the oxide on 6H—SiC in N2O at a temperature of 1100° C. has also been investigated by P. T. Lai, Supratic Chakraborty, C. L. Chan, and Y. C. Cheng, “Effects of nitridation and annealing on interface properties of thermally oxidized SiO2/SiC metal-oxide-semiconductor system,” Applied Physics Letters, Vol. 76, No. 25, pp. 3744-3746, June 2000 (hereinafter, “Lai et al.”), the disclosure of which is incorporated by reference as if set forth fully herein. However, Lai et al. concluded that such treatment deteriorates the interface quality which may be improved with a subsequent wet or dry anneal in O2 which may repair the damage induced by nitridation in N2O. Moreover, even with a subsequent O2 anneal, Lai et al. did not see any significant reduction in interface state density as compared to the case without nitridation in N2O.
In addition to NO and N2O growth and annealing, research has also been conducted on post growth anneals in other environments. For example, Suzuki et al. investigated post oxidation annealing in hydrogen. Suzuki et al., “Effect of Post-oxidation-annealing in Hydrogen on SiO2/4H—SiC Interface,” Material Science Forum, Vols. 338-342, pp. 1073-1076, 2000. These researchers reported that flat-band voltage shift and interface state density could be improved by post oxidation annealing in both argon and hydrogen. In this research, 4H—SiC was oxidized in dry O2 at 1200° C. Post oxidation annealing was then carried out in argon or hydrogen for 30 minutes at 400, 700, 800 and 1000° C. Other researchers, however, have reported that post oxidation anneals in hydrogen provide no increased benefit over post oxidation anneals in other gases, as described in Mrinal Das, “Fundamental Studies of the Silicon Carbide MOS Structure,” Doctoral Thesis, Purdue University, submitted December, 1999.